Motorola 68851
E270645
The Motorola 68851 is an external paged memory management unit (MMU) designed to work with Motorola 68020 processors, providing advanced virtual memory and protection features.
All labels observed (1)
| Label | Occurrences |
|---|---|
| Motorola 68851 canonical | 2 |
How this entity was disambiguated
This entity first appeared as the object of triple T1775011 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
Target entity: Motorola 68851 Context triple: [Linux/m68k, supportsMMU, Motorola 68851]
-
A.
Motorola 68030 microprocessor
The Motorola 68030 microprocessor is a 32-bit CISC CPU from Motorola's 680x0 family, widely used in late-1980s and early-1990s workstations, servers, and personal computers such as early Apple Macintosh models.
-
B.
Motorola 68020 microprocessor
The Motorola 68020 microprocessor is a 32-bit CISC CPU introduced in the early 1980s that powered many workstations, servers, and Apple Macintosh computers, offering enhanced performance and features over its 68000-series predecessors.
-
C.
Motorola 68040 microprocessor
The Motorola 68040 microprocessor is a 32-bit CISC CPU from the Motorola 680x0 family, widely used in early 1990s workstations, servers, and Apple Macintosh computers for its integrated floating-point and memory management units.
-
D.
Motorola 68000 family
The Motorola 68000 family is a line of 16/32-bit CISC microprocessors widely used in early personal computers, workstations, and game consoles during the 1980s and early 1990s.
-
E.
Motorola 88000 family
The Motorola 88000 family is a RISC-based microprocessor line developed by Motorola as a high-performance follow-up to its earlier 68000 series, aimed primarily at workstations and embedded systems.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Target entity: Motorola 68851 Target entity description: The Motorola 68851 is an external paged memory management unit (MMU) designed to work with Motorola 68020 processors, providing advanced virtual memory and protection features.
-
A.
Motorola 68030 microprocessor
The Motorola 68030 microprocessor is a 32-bit CISC CPU from Motorola's 680x0 family, widely used in late-1980s and early-1990s workstations, servers, and personal computers such as early Apple Macintosh models.
-
B.
Motorola 68020 microprocessor
The Motorola 68020 microprocessor is a 32-bit CISC CPU introduced in the early 1980s that powered many workstations, servers, and Apple Macintosh computers, offering enhanced performance and features over its 68000-series predecessors.
-
C.
Motorola 68040 microprocessor
The Motorola 68040 microprocessor is a 32-bit CISC CPU from the Motorola 680x0 family, widely used in early 1990s workstations, servers, and Apple Macintosh computers for its integrated floating-point and memory management units.
-
D.
Motorola 68000 family
The Motorola 68000 family is a line of 16/32-bit CISC microprocessors widely used in early personal computers, workstations, and game consoles during the 1980s and early 1990s.
-
E.
Motorola 88000 family
The Motorola 88000 family is a RISC-based microprocessor line developed by Motorola as a high-performance follow-up to its earlier 68000 series, aimed primarily at workstations and embedded systems.
- F. None of above. chosen
Statements (56)
| Predicate | Object |
|---|---|
| instanceOf |
integrated circuit
ⓘ
memory management unit ⓘ |
| addressBusWidth | 32-bit ⓘ |
| architecture | 32-bit ⓘ |
| designedForProcessor |
Motorola 68020 microprocessor
ⓘ
surface form:
MC68020
|
| designedForProcessorFamily |
Motorola 68020 microprocessor
ⓘ
surface form:
Motorola 68020
|
| family | Motorola 680x0 coprocessors ⓘ |
| function |
memory protection
ⓘ
paged memory management ⓘ virtual memory support ⓘ |
| generation | Motorola 68000 family ⓘ |
| hasRegister |
root pointer register
ⓘ
status register ⓘ translation control register ⓘ |
| hasTranslationTable |
pointer to page tables
ⓘ
root pointer register ⓘ |
| interfaceType | coprocessor interface to 68020 ⓘ |
| isExternalTo |
Motorola 68020 microprocessor
ⓘ
surface form:
MC68020 CPU core
|
| manufacturer | Motorola ⓘ |
| packageType |
PGA
ⓘ
PLCC ⓘ |
| provides | hardware support for Unix-like virtual memory ⓘ |
| supportsAddressSpace | multiple logical address spaces ⓘ |
| supportsFeature |
address translation
ⓘ
copyback and writethrough control ⓘ demand-paged virtual memory ⓘ memory access protection ⓘ page-based memory management ⓘ segmentation ⓘ |
| supportsOperatingMode |
early termination of translation
ⓘ
paged translation mode ⓘ transparent translation mode ⓘ |
| supportsPageSize |
1 GB
ⓘ
1 MB ⓘ 128 KB ⓘ 128 MB ⓘ 16 KB ⓘ 16 MB ⓘ 2 GB ⓘ 2 MB ⓘ 256 KB ⓘ 256 MB ⓘ 32 KB ⓘ 32 MB ⓘ 4 GB ⓘ 4 KB ⓘ 4 MB ⓘ 512 KB ⓘ 512 MB ⓘ 64 KB ⓘ 64 MB ⓘ 8 KB ⓘ 8 MB ⓘ |
| usedWith |
Motorola 68020-based servers
ⓘ
Motorola 68020-based workstations ⓘ embedded systems based on 68020 ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Subject: Motorola 68851 Description of subject: The Motorola 68851 is an external paged memory management unit (MMU) designed to work with Motorola 68020 processors, providing advanced virtual memory and protection features.
Referenced by (2)
Full triples — surface form annotated when it differs from this entity's canonical label.