A Logical Design of an Intermediate Speed Digital Computer
E219381
"A Logical Design of an Intermediate Speed Digital Computer" is Gene Amdahl’s doctoral thesis, presenting an early and influential computer architecture design that helped launch his career in computer engineering.
All labels observed (1)
| Label | Occurrences |
|---|---|
| A Logical Design of an Intermediate Speed Digital Computer canonical | 1 |
How this entity was disambiguated
This entity first appeared as the object of triple T1961141 — resolving that mention is where its identity was fixed. The disambiguator weighed these candidate entities and picked the highlighted one (or “None”, minting a new entity). This is how homonymy is resolved: the same surface form can point to different entities.
Target entity: A Logical Design of an Intermediate Speed Digital Computer Context triple: [Gene Amdahl, doctoralThesis, A Logical Design of an Intermediate Speed Digital Computer]
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A.
First Draft of a Report on the EDVAC
First Draft of a Report on the EDVAC is a seminal 1945 technical report that laid out the stored-program computer architecture that became the foundation for most modern computers.
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B.
Control Program for Microcomputers
Control Program for Microcomputers is an early operating system widely used on 8-bit microcomputers in the late 1970s and early 1980s, known for influencing the design of later systems like MS-DOS.
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C.
A Symbolic Analysis of Relay and Switching Circuits
A Symbolic Analysis of Relay and Switching Circuits is Claude Shannon’s landmark 1937 master’s thesis that founded modern digital circuit design by applying Boolean algebra to relay and switching systems.
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D.
EDVAC
EDVAC was one of the earliest electronic stored-program computers, pioneering the use of binary arithmetic and influencing the development of modern computer architecture.
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E.
ENIAC project
The ENIAC project was an early U.S. military-funded effort during World War II to develop one of the first general-purpose electronic digital computers, laying foundational concepts for modern computing.
- F. None of above. chosen
- G. Unsure - the case is ambiguous/there is not enough information to decide.
Target entity: A Logical Design of an Intermediate Speed Digital Computer Target entity description: "A Logical Design of an Intermediate Speed Digital Computer" is Gene Amdahl’s doctoral thesis, presenting an early and influential computer architecture design that helped launch his career in computer engineering.
-
A.
First Draft of a Report on the EDVAC
First Draft of a Report on the EDVAC is a seminal 1945 technical report that laid out the stored-program computer architecture that became the foundation for most modern computers.
-
B.
Control Program for Microcomputers
Control Program for Microcomputers is an early operating system widely used on 8-bit microcomputers in the late 1970s and early 1980s, known for influencing the design of later systems like MS-DOS.
-
C.
A Symbolic Analysis of Relay and Switching Circuits
A Symbolic Analysis of Relay and Switching Circuits is Claude Shannon’s landmark 1937 master’s thesis that founded modern digital circuit design by applying Boolean algebra to relay and switching systems.
-
D.
EDVAC
EDVAC was one of the earliest electronic stored-program computers, pioneering the use of binary arithmetic and influencing the development of modern computer architecture.
-
E.
ENIAC project
The ENIAC project was an early U.S. military-funded effort during World War II to develop one of the first general-purpose electronic digital computers, laying foundational concepts for modern computing.
- F. None of above. chosen
Statements (31)
| Predicate | Object |
|---|---|
| instanceOf |
academic dissertation
ⓘ
doctoral thesis ⓘ |
| academicAdvisor | Arthur Burks ⓘ |
| academicDegree | PhD ⓘ |
| author | Gene Amdahl ⓘ |
| conferredTo | Gene Amdahl ⓘ |
| contributionTo | development of Gene Amdahl’s career ⓘ |
| countryOfInstitution |
United States of America
ⓘ
surface form:
United States
|
| describes | design of an intermediate speed digital computer ⓘ |
| discipline |
computer science
ⓘ
electrical engineering ⓘ |
| field |
computer architecture
ⓘ
computer engineering ⓘ digital computers ⓘ |
| hasAuthorProfession |
computer architect
ⓘ
computer engineer ⓘ |
| hasForm | printed dissertation ⓘ |
| helpedLaunchCareerOf | Gene Amdahl ⓘ |
| impact | recognized as an important early work in computer architecture ⓘ |
| influenced | early computer architecture research ⓘ |
| institution | University of Wisconsin–Madison ⓘ |
| language | English ⓘ |
| notableFor | early and influential computer architecture design ⓘ |
| relatedTo |
instruction set design
ⓘ
logical organization of computing systems ⓘ mainframe computer design ⓘ |
| timePeriod | early era of digital computers ⓘ |
| topic |
computer architecture design
ⓘ
intermediate speed digital computer ⓘ logical design of computers ⓘ |
| typeOfWork | technical report ⓘ |
How these facts were elicited
The pipeline generated the facts above by prompting gpt-5.1 with this entity's name + description and the instruction below.
You are a knowledge base construction expert. Given a subject entity and a description of it, return factual statements that you know for the subject as a JSON list of dictionaries(triples), where keys must be "subject", "predicate" and "object". The number of facts may be very high, between 25 to 50 or more, for very popular subjects. For less popular subjects, the number of facts can be very low, like 5 or 10. # Requirements - If you don't know the subject at all, return an empty list. - If the subject is not a named entity, return an empty list. - Include at least one triple where predicate is "instanceOf". - Do not get too wordy. - Separate several objects into multiple triples with one object.
Subject: A Logical Design of an Intermediate Speed Digital Computer Description of subject: "A Logical Design of an Intermediate Speed Digital Computer" is Gene Amdahl’s doctoral thesis, presenting an early and influential computer architecture design that helped launch his career in computer engineering.
Referenced by (1)
Full triples — surface form annotated when it differs from this entity's canonical label.